RT8525 ? ds8525-01 march 2012 www.richtek.com 1 ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. boost controller with dimming control pin configurations sop-14 (top view) marking information RT8525gs : product number ymdnn : date code general description the RT8525 is a wide input operating voltage range step up controller. high voltage output and large output current are feasible by using an external n-mosfet. the RT8525 input operating range is from 4.5v to 29v. the RT8525 is an optimized design for wide output voltage range applications. the output voltage of the RT8525 can be adjusted by the fb pin. the pwmi pin can be used as a digital input, allowing wled brightness control with a logic-level pwm signal. features z vin range : 4.5v to 29v z programmable soft-start time z programmable boost sw frequency from 50khz to 600khz z output over voltage protection z output under voltage protection z 14-lead sop package z rohs compliant and halogen free applications z z z z z lcd tv, monitor display backlight z z z z z led driver application RT8525 gsymdnn drv pgnd isw en oovp fb fault vdc vin comp ss fsw agnd pwmi 2 3 4 5 8 7 6 14 13 12 11 10 9 typical application circuit package type s : sop-14 RT8525 lead plating system g : green (halogen free and pb free) r s r slp m1 d1 l1 drv isw pgnd oovp fault RT8525 vin vdc c dc en chip enable c c2 r c c c1 r sw c ss fsw ss comp fb 14 11 13 9 10 2 1 3 5 4 12 8 r flt agnd 6 pwmi pwmi 7 v in 12v 33h 2.4k 50m 100k c ovp 0.33f 56k 33k 27nf c vin c in 100f 1f 1f r ovp1 r ovp2 150k 6k r fb1 r fb2 3k 117k c out v out 100f x 2 50v 24v
2 RT8525 www.richtek.com ds8525-01 march 2012 ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. function block diagram functional pin description pin no. pin name pin function 1 vdc output of internal pre-regulator. 2 vin ic power supply. 3 comp compensation for error amplifier. connect a compensation network to ground. 4 ss external capacitor to adjust soft-start time. 5 fsw frequency adjust pin. this pin allows setting the switching frequency with a resistor from 50khz to 600khz. 6 agnd analog ground. 7 pwmi external digital input for dimming function. 8 fault open drain output for fault detection. 9 fb feedback to error amplifier input. 10 oovp sense output voltage for over voltage protection and under voltage protection. 11 i sw external mosfet switch current sense pin. connect the current sense resistor between the external n-mosfet switch and ground. 12 en chip enable (active high). 13 pgnd power ground of boost controller. 14 drv drive output for the n-mosfet. uvlo 12v ldo otp + - + - oovp/ouvp logic q q s r osc + - oc + - + - blanking pwm controller - + - ea 0.1v 2.5v 0.4v 1.25v 4a fault protection fault vdc vin fsw oovp drv isw fb comp ss en v os pwmi agnd pgnd
3 RT8525 ds8525-01 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. electrical characteristics (v in = 21v, v out = 50v, t a = 25 c, unless otherwise specified) parameter symbol test conditions min typ max unit input power supply quiescent current i q no switching, r sw = 56k -- 1.3 2 ma shutdown current i shdn v en = 0v -- 10 -- a under voltage lockout threshold v uvlo v in rising -- 3.8 -- v under voltage lockout hysteresis v uvlo -- 500 -- mv 12v regulator 13.5v < v in < 16v, 1ma < i load < 100ma 16v < v in < 20v, 1ma < i load < 50ma regulator output voltage v dc 20v < v in < 29v, 1ma < i load < 20ma 11.4 12 12.6 v dropout voltage v drop v in ? v dc , v in = 12v, i load = 100ma -- 500 -- mv short-circuit current limit i sc v dc short to gnd -- 270 -- ma control input logic-high v ih 2 -- -- en threshold voltage logic-low v il -- -- 0.8 v en sink current i ih v en = 5v -- 5 -- a sleeping mode t sleep r sw = 56k , en = l, 12v regular shutdown 55 -- -- ms shutdown delay shutdown mode t shdn r sw = 56k , en = l, ic shutdown 110 -- -- ms absolute maximum ratings (note 1) z vin to gnd ------------------------------------------------------------------------------------------------------------------ ? 0.3v to 32v z vdc, drv, f ault to gnd ----------------------------------------------------------------------------------------------- ? 0.3v to 13.2v z en, comp, ss, fsw, fb, oovp , isw, pwmi to gnd --------------------------------------------------------- ? 0.3v to 6v z power dissipation, p d @ t a = 25 c sop-14 ---------------------------------------------------------------------------------------------------------------------- 1.000w z package thermal resistance (note 2) sop-14 , ja ---------------------------------------------------------------------------------------------------------------- 100 c/w z lead temperature (soldering, 10 sec.) ------------------------------------------------------------------------------- 260 c z junction temperature ----------------------------------------------------------------------------------------------------- 150 c z storage temperature range -------------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm -------------------------------------------------------------------------------------------------------------------------- 2k v mm ---------------------------------------------------------------------------------------------------------------------------- 2 00v recommended operating conditions (note 4) z supply input voltage, vin ----------------------------------------------------------------------------------------------- 4.5v to 29v z junction temperature range -------------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range -------------------------------------------------------------------------------------------- ? 40 c to 85 c
4 RT8525 www.richtek.com ds8525-01 march 2012 ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured at t a = 25 c on a low effective thermal conductivity single-layer test board per jedec 51-3. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.. parameter symbol test conditions min typ max unit boost controller switching frequency f sw r sw = 56k -- 200 -- khz minimum on-time t mon -- 250 -- ns maximum duty d max switching 90 -- -- % feedback voltage v fb 1.225 1.25 1.275 v slope compensation peak magnitude of slope compensation current i slope, pk -- 50 -- a soft-start soft-start current i ss 3 4 5 a gate driver r ds(on)_n i sink = 100ma (n-mosfet) -- 1 -- drv on-resistance r ds(on)_p i source = 100ma (p-mosfet) -- 1.5 -- peak sink current i peaksk c load = 1nf -- 2.2 -- a peak source current i peaksr c load = 1nf -- 2.55 -- a rise time t r c load = 1nf -- 6 -- ns fall time t f c load = 1nf -- 5 -- ns pwm dimming control logic-high v pwmi_h 2 -- -- pw mi threshold voltage logic-low v pwmi_l -- -- 0.8 v protection function ocp threshold v ocp including slope compensation magnitude -- 0.4 -- v v out ovp threshold v ovp 2.375 2.5 2.625 v v out uvp threshold v uvp -- 0.1 -- v thermal shutdown temperature t sd -- 150 -- c thermal shutdown hysteresis t sd -- 50 -- c
5 RT8525 ds8525-01 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. feedback voltage vs. temperature 1.0 1.1 1.2 1.3 1.4 1.5 -50 -25 0 25 50 75 100 125 temperature (c) feedback voltage (v) feedback voltage vs. input voltage 1.0 1.1 1.2 1.3 1.4 1.5 4 9 14 19 24 29 input voltage (v) feedback voltage (v) typical operating characteristics boost efficiency vs. load current 50 60 70 80 90 100 0 0.4 0.8 1.2 1.6 2 load current (a) efficiency(%) v in = 24v, v out = 50v switching frequency vs. temperature 100 140 180 220 260 300 -50-25 0 25 50 75100125 temperature (c) switching frequency (khz) 1 r sw = 56k quiescent current vs . input voltage 0.0 0.5 1.0 1.5 2.0 2.5 3.0 4 9 14 19 24 29 input voltage (v) quiescent current (ma ) no switching quiescent current vs. temperature 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -50 -25 0 25 50 75 100 125 temperature (c) quiescent current (ma ) no switching
6 RT8525 www.richtek.com ds8525-01 march 2012 ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. applications information the RT8525 is a wide input operating voltage range step up controller. high voltage output and large output current are feasible by using an external n-mosfet. the protection functions include output over voltage, output under voltage, over temperature and current limiting protection. boost output voltage setting the regulated output voltage is set by an external resistor divider according to the following equation : ?? ?? ?? fb1 out fb fb fb2 r v = v 1+ , where v = 1.25v (typ.) r the recommended value of r fb2 should be at least 1k for saving sacrificing. moreover, placing the resistor divider as close as possible to the chip can reduce noise sensitivity. boost switching frequency the RT8525 boost driver switching frequency is able to be adjusted by a resistor r sw ranging from 18k to 220k . the following figure illustrates the corresponding switching frequency within the resistor range. figure 1. boost switching frequency switching frequency vs. r sw 0 100 200 300 400 500 600 0 50 100 150 200 250 r sw (k ) f sw (khz) boost loop compensation the voltage feedback loop can be compensated by an external compensation network consisted of r c , c c1 and c c2 . choose r c to set high frequency gain for fast transient response. select c c1 and c c2 to set the zero and pole to maintain loop stability. for typical application, v in = 24v, v out = 50v, c out = 100 f x 2, l1 = 33 h, while the recommended value for compensation is as follows : r c = 33k , c c1 = 27nf. soft-start the soft-start of the RT8525 can be achieved by connecting a capacitor from the ss pin to gnd. the built-in soft-start circuit reduces the start-up current spike and output voltage overshoot. the external capacitor charged by an internal 4 a constant charging current determines the soft- start time. the ss pin limits the rising rate of the comp pin voltage and thereby limits the peak switch current. the soft-start interval is set by the soft-start capacitor according to the following equation : ? 5 ss ss tc510 a typical value for the soft-start capacitor is 0.33 f. the soft-start capacitor is discharged when en voltage falls below its threshold after shutdown delay or uvlo occurs. slope compensation and current limiting a slope compensation is applied to avoid sub-harmonic oscillation in current-mode control. the slope compensation voltage is generated by the internal ramp current flow through a slope compensation resistor r slp . the inductor current is sensed by the sensing resistor r s . both of them are added and presented on the isw pin. the internal ramp current is rising linearly form zero at the beginning of each switching cycle to 50 a in maximum on-time of each cycle. the slope compensation resistor r slp can be calculated by the following equation : where r s is current sensing resistor, l is inductor value, and f sw is boost switching frequency. the current flow through inductor during charging period is detected by a sensing resistor r s . besides, the slope compensation voltage also attributes magnitude to isw. as the voltage at the isw pin is over 0.4v, the drv will be pulled low and turn off the external n-mosfet. so that the inductor will be forced to leave charging stage and enter discharging stage to prevent over current. the current limiting can be calculated by the following equation: () ? out in s slp sw vvr r > 2l50 f
7 RT8525 ds8525-01 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. where i l, pk is peak inductor current, and d max is maximum duty. output over voltage protection the output voltage can be clamped at the voltage level determined by the following equation : ?? ?? ?? ovp1 out (oovp) oovp ovp2 oovp r v = v1+, r where v = 2.5v (typ.) power mosfet selection for the applications operating at high output voltage, switching losses dominate the overall power loss. therefore, the power n-mosfet switch is typically chosen for drain voltage, vds, rating and low gate charge. consideration of switch on-resistance r ds(on) is usually secondary. the vdc regulator in the RT8525 has a fixed output current limit to protect the ic and provide 12v drv voltage for n-mosfet switch gate driver. () ? 2 out sw out d1d v l = 2f i inductor selection the boundary value of the inductance l between discontinuous conduction mode (dcm) and continuous conduction mode (ccm) can be approximated by the following equation : figure 2. fault protection function block where v out is the maximum output voltage, v in is the minimum input voltage, fsw is the operating frequency, i out is the sum of current from all led strings, and d is the duty cycle calculated by the following equation : ? out in out vv d = v the boost converter operates in dcm over the entire input voltage range if the inductor value is less than the boundary value l. with an inductance greater than l, the converter operates in ccm at the minimum input voltage and may transit to dcm at higher voltages. the inductor must be action 1 action 2 node a comparator 1 comparator 2 1.25v + - + - + 0.25v + 8k oovp ouvp, otp switch 1 switch 2 12v r flt 100k fault ? max slp s l, pk 0.4 d r 50 r < i be under 0.25v. then the protection function will perform action 2 to turn off the driver. when protection function is released, the RT8525 will re-start. on the other hand, if the triggered protection is oovp, the voltage at node a will be decided by voltage divider composed of r flt and the internal 8k resistor. this voltage must be designed between 0.25v and 1.25v by choosing r flt appropriately. once the oovp turns on the switch 2, the divided fault voltage will activate action 1 to turn off the driver without resetting soft-start. therefore, when protection function oovp is released, the RT8525 will be in normal operation. where r ovp1 and r ovp2 are the voltage divider connected to the oovp pin. fault protection the fault pin will be pulled low once a protection is triggered, and a suitable pulled-high r flt is required. the suggested r flt is 100k if the pulled-high voltage was 12v. the following figure illustrates the fault protection function block. if one of the ouvp and otp occurs, the switch 1 will be turned on, and the voltage at node a will
8 RT8525 www.richtek.com ds8525-01 march 2012 ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction to ambient thermal resistance. for recommended operating condition specifications, the maximum junction temperature is 125 c. the junction to ambient thermal resistance, ja , is layout dependent. for sop-14 packages, the thermal resistance, ja , is 100 c/ w on a standard jedec 51-3 single-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c) / (100 c/w) = 1.000w for sop-14 package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . the derating curve in figure 4 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. + out out lpk in vi vin d t i = v2l where is the efficiency of the power converter. ?? ???? + ? + ?? ???? ?? ???? ?? in in l out in l out out out out1 sw v 11 1 q = i i i i i i 22 2 v 1 = c v f where f sw is the switching frequency, and i l is the inductor ripple current. move c out to the left side to estimate the value of v out1 as the following equation : out out1 out sw di v = cf finally, by taking esr into consideration, the overall output ripple voltage can be determined as the following equation : ?+ out out in out sw di v = i esr cf figure 3. the output ripple voltage without the contribution of esr diode selection schottky diodes are recommended for most applications because of their fast recovery time and low forward voltage. the power dissipation, reverse voltage rating and pulsating peak current are the important parameters for schottky diode selection. make sure that the diode's peak current rating exceeds i lpk , and reverse voltage rating exceeds the maximum output voltage. capacitor selection output ripple voltage is an important index for estimating the performance. this portion consists of two parts, one is the product of input current and esr of output capacitor, another part is formed by charging and discharging process of output capacitor. refer to figure 3, evaluate v out1 by ideal energy equalization. according to the definition of q, the q value can be calculated as following equation : time time inductor current output current output ripple voltage (ac) (1-d)t s v out1 i l input current selected with a saturated current rating greater than the peak current provided by the following equation :
9 RT8525 ds8525-01 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. layout considerations pcb layout is very important for designing switching power converter circuits. the following layout guides should be strictly followed for best performance of the RT8525. ` the power components l 1 , d 1 , c in , c out , m 1 and r s must be placed as close as possible to reduce current loop. the pcb trace between power components must be as short and wide as possible. ` place components r fb1 , r fb2 , r ovp1 and r ovp2 close to ic as possible. the trace should be kept away from the power loops and shielded with a ground trace to prevent any noise coupling. ` the compensation circuit should be kept away from the power loops and should be shielded with a ground trace to prevent any noise coupling. place the compensation components to the comp pin as close as possible, no matter the compensation is r c , c c1 or c c2 . figure 5. pcb layout guide figure 4. derating curve of maximum power dissipation drv pgnd isw en oovp fb fault vdc vin comp ss fsw agnd pwmi 2 3 4 5 8 7 6 14 13 12 11 10 9 r c c c1 c c2 pgnd v in c in v in r slp r s m1 c out d1 l1 v out agnd r ovp2 r fb2 r ovp1 r fb1 pgnd the compensation circuit should be kept away from the power loops and should be shielded with a ground trace to prevent any noise coupling. place the power components as cl ose as possible. the traces should be wide and short especia lly for the high-current loop. the feedback voltage divider resistors must near the feedback pin. the divider center trace must be shorter and avoid the trace near any switching nodes. v out agnd is suggested that connect to pgnd from the sense resistor r s for better stability. 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) 1 single-layer pcb
10 RT8525 www.richtek.com ds8525-01 march 2012 richtek technology corporation 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. outline dimension a b f j d c i h m dimensions in millimeters dimensions in inches symbol min max min max a 8.534 8.738 0.336 0.344 b 3.810 3.988 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.508 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.178 0.254 0.007 0.010 i 0.102 0.254 0.004 0.010 j 5.791 6.198 0.228 0.244 m 0.406 1.270 0.016 0.050 14 ? lead sop plastic package
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